Datasheet

Section 16 Serial Communication Interface 3 (SCI3)
Rev. 3.00 Sep. 10, 2007 Page 286 of 528
REJ09B0216-0300
Clock synchronous mode
• Data length: 8 bits
• Receive error detection: Overrun errors
Table 16.1 Channel Configuration
Channel Abbreviation Pin Register Register Address
SMR H'FFA8
BRR H'FFA9
SCR3 H'FFAA
TDR H'FFAB
SSR H'FFAC
RDR H'FFAD
RSR 
Channel 1 SCI3* SCK3
RXD
TXD
TSR 
SMR_2 H'F740
BRR_2 H'F741
SCR3_2 H'F742
TDR_2 H'F743
SSR_2 H'F744
RDR_2 H'F745
RSR_2 
Channel 2 SCI3_2 SCK3_2
RXD_2
TXD_2
TSR_2 
Note: * The channel 1 of the SCI3 is used in on-board programming mode by boot mode.