Datasheet

Section 1 Overview
Rev. 3.00 Sep. 10, 2007 Page 4 of 528
REJ09B0216-0300
1.2 Block Diagram
P10/TMOW
P11/PWM
P12
P14/IRQ0
P15/IRQ1/TMIB1
P16/IRQ2
P17/IRQ3/TRGV
P57/SCL
P56/SDA
P55/WKP5/ADTRG
P54/WKP4
P53/WKP3
P52/WKP2
P51/WKP1
P50/WKP0
PB0/AN0 PB1/AN1 PB2/AN2 PB3/AN3 PB4/AN4 PB5/AN5
PB6/AN6/ExtD PB7/AN7/ExtU
V
CL
V
CC
V
SS
RES TEST NMI
AV
CC
P20/SCK3
P21/RXD
P22/TXD
P23
P24
P87
P86
P85
(OSC1) (OSC2) X1 X2
CPU
H8/300H
ROM
RAM
Data bus (lower)
Data bus (upper)
RTC
14-bit PWM
Timer Z
SCI3
IIC2
SCI3_2
Timer V
Timer B1
POR&LVD
Watchdog
timer
A/D converter
P67/FTIOD1
P66/FTIOC1
P65/FTIOB1
P64/FTIOA1
P63/FTIOD0
P62/FTIOC0
P61/FTIOB0
P60/FTIOA0
P76/TMOV
P75/TMCIV
P74/TMRIV
P72/TXD_2
P71/RXD_2
P70/SCK3_2
P30
P31
P32
P33
P34
P35
P36
P37
Subclock
oscillator
External
clock
oscillator
On-chip
oscillator
Port B
PC0/OSC1
PC1/OSC2/CLKOUT
Port C
Address bus
Port 3Port 5 Port 2 Port 1
Port 6Port 7Port 8
Figure 1.1 Block Diagram of H8/36079 Group and H8/36077 Group