Datasheet

Section 21 List of Registers
Rev. 3.00 Sep. 10, 2007 Page 400 of 528
REJ09B0216-0300
Register
Abbre-
viation
Bit No
Address
Module
Name
Data
Bus
Width
Access
State
A/D control register ADCR 8 H'FFB9 A/D
converter
8 3
   H'FFBA,
H'FFBB
  
PWM data register L PWDRL 8 H'FFBC 14-bit PWM 8 2
PWM data register U PWDRU 8 H'FFBD 14-bit PWM 8 2
PWM control register PWCR 8 H'FFBE 14-bit PWM 8 2
   H'FFBF 14-bit PWM  
Timer control/status register WD TCSRWD 8 H'FFC0 WDT*
1
8 2
Timer counter WD TCWD 8 H'FFC1 WDT*
1
8 2
Timer mode register WD TMWD 8 H'FFC2 WDT*
1
8 2
   H'FFC3 WDT*
1
 
   H'FFC4
to
H'FFC7
  
Address break control register ABRKCR 8 H'FFC8 Address break 8 2
Address break status register ABRKSR 8 H'FFC9 Address break 8 2
Break address register H BARH 8 H'FFCA Address break 8 2
Break address register L BARL 8 H'FFCB Address break 8 2
Break data register H BDRH 8 H'FFCC Address break 8 2
Break data register L BDRL 8 H'FFCD Address break 8 2
   H'FFCE   
Break address register E*
2
BARE 8 H'FFCF Address break 8 2
Port pull-up control register 1 PUCR1 8 H'FFD0 I/O port 8 2
Port pull-up control register 5 PUCR5 8 H'FFD1 I/O port 8 2
   H'FFD2,
H'FFD3
I/O port  
Port data register 1 PDR1 8 H'FFD4 I/O port 8 2
Port data register 2 PDR2 8 H'FFD5 I/O port 8 2
Port data register 3 PDR3 8 H'FFD6 I/O port 8 2
   H'FFD7 I/O port  
Port data register 5 PDR5 8 H'FFD8 I/O port 8 2