Datasheet

Section 21 List of Registers
Rev. 3.00 Sep. 10, 2007 Page 413 of 528
REJ09B0216-0300
Register
Name Reset Active Sleep Subactive Subsleep Standby Module
IEGR1 Initialized      Interrupt
IEGR2 Initialized     
IENR1 Initialized     
IENR2 Initialized     
IRR1 Initialized     
IRR2 Initialized     
IWPR Initialized     
MSTCR1 Initialized      Low power
MSTCR2 Initialized     
Notes:  is not initialized
1. WDT: Watchdog timer
2. The BARE register is only provided for microcontrollers that support advanced mode.