Datasheet

Section 13 Timer Z
Rev. 3.00 Sep. 10, 2007 Page 206 of 528
REJ09B0216-0300
• General register C_1 (GRC_1)
• General register D_1 (GRD_1)
13.3.1 Timer Start Register (TSTR)
TSTR selects the operation/stop for the TCNT counter.
Bit Bit Name
Initial
Value
R/W Description
7 to 2  All 1  Reserved
These bits are always read as 1, and cannot be modified.
1 STR1 0 R/W Channel 1 Counter Start
0: TCNT_1 halts counting
1: TCNT_1 starts counting
0 STR0 0 R/W Channel 0 Counter Start
0: TCNT_0 halts counting
1: TCNT_0 starts counting
13.3.2 Timer Mode Register (TMDR)
TMDR selects buffer operation settings and synchronized operation.
Bit Bit Name
Initial
Value
R/W Description
7 BFD1 0 R/W Buffer Operation D1
0: GRD_1 operates normally
1: GRB_1 and GRD_1 are used together for buffer
operation
6 BFC1 0 R/W Buffer Operation C1
0: GRC_1 operates normally
1: GRA_1 and GRD_1 are used together for buffer
operation
5 BFD0 0 R/W Buffer Operation D0
0: GRD_0 operates normally
1: GRB_0 and GRD_0 are used together for buffer
operation