Datasheet

Rev. 2.00 Sep. 23, 2005 Page xx of xxx
Figure 5.4 Equivalent Circuit of Crystal Resonator...................................................................... 68
Figure 5.5 Typical Connection to Ceramic Resonator.................................................................. 69
Figure 5.6 Example of External Clock Input................................................................................ 69
Figure 5.7 Block Diagram of Subclock Generator ....................................................................... 70
Figure 5.8 Typical Connection to 32.768-kHz Crystal Resonator................................................ 70
Figure 5.9 Equivalent Circuit of 32.768-kHz Crystal Resonator.................................................. 70
Figure 5.10 Pin Connection when not Using Subclock ................................................................ 71
Figure 5.11 Example of Incorrect Board Design.......................................................................... 72
Section 6 Power-Down Modes
Figure 6.1 Mode Transition Diagram ........................................................................................... 79
Section 7 ROM
Figure 7.1 Flash Memory Block Configuration............................................................................ 88
Figure 7.2 Programming/Erasing Flowchart Example in User Program Mode............................ 97
Figure 7.3 Program/Program-Verify Flowchart ........................................................................... 99
Figure 7.4 Erase/Erase-Verify Flowchart ................................................................................... 102
Section 9 I/O Ports
Figure 9.1 Port 1 Pin Configuration............................................................................................ 109
Figure 9.2 Port 2 Pin Configuration............................................................................................ 115
Figure 9.3 Port 3 Pin Configuration............................................................................................ 118
Figure 9.4 Port 5 Pin Configuration............................................................................................ 122
Figure 9.5 Port 6 Pin Configuration............................................................................................ 128
Figure 9.6 Port 7 Pin Configuration............................................................................................ 134
Figure 9.7 Port 8 Pin Configuration............................................................................................ 137
Figure 9.8 Port B Pin Configuration...........................................................................................139
Section 10 Realtime Clock (RTC)
Figure 10.1 Block Diagram of RTC ........................................................................................... 142
Figure 10.2 Definition of Time Expression ................................................................................ 147
Figure 10.3 Initial Setting Procedure.......................................................................................... 150
Figure 10.4 Example: Reading of Inaccurate Time Data............................................................ 151
Section 11 Timer B1
Figure 11.1 Block Diagram of Timer B1.................................................................................... 153
Section 12 Timer V
Figure 12.1 Block Diagram of Timer V ..................................................................................... 160
Figure 12.2 Increment Timing with Internal Clock.................................................................... 167
Figure 12.3 Increment Timing with External Clock................................................................... 167
Figure 12.4 OVF Set Timing...................................................................................................... 167
Figure 12.5 CMFA and CMFB Set Timing ................................................................................ 168