Datasheet

Rev. 2.00 Sep. 23, 2005 Page xxi of xxx
Figure 12.6 TMOV Output Timing ............................................................................................ 168
Figure 12.7 Clear Timing by Compare Match............................................................................ 168
Figure 12.8 Clear Timing by TMRIV Input ............................................................................... 169
Figure 12.9 Pulse Output Example ............................................................................................. 169
Figure 12.10 Example of Pulse Output Synchronized to TRGV Input....................................... 170
Figure 12.11 Contention between TCNTV Write and Clear ...................................................... 171
Figure 12.12 Contention between TCORA Write and Compare Match ..................................... 172
Figure 12.13 Internal Clock Switching and TCNTV Operation................................................. 172
Section 13 Timer Z
Figure 13.1 Timer Z Block Diagram .......................................................................................... 175
Figure 13.2 Timer Z (Channel 0) Block Diagram ...................................................................... 176
Figure 13.3 Timer Z (Channel 1) Block Diagram ...................................................................... 177
Figure 13.4 Example of Outputs in Reset Synchronous PWM Mode and Complementary
PWM Mode ............................................................................................................. 184
Figure 13.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 bits))........ 196
Figure 13.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 bits)).............196
Figure 13.7 Example of Counter Operation Setting Procedure .................................................. 197
Figure 13.8 Free-Running Counter Operation ............................................................................ 198
Figure 13.9 Periodic Counter Operation..................................................................................... 199
Figure 13.10 Count Timing at Internal Clock Operation............................................................ 199
Figure 13.11 Count Timing at External Clock Operation (Both Edges Detected)...................... 200
Figure 13.12 Example of Setting Procedure for Waveform Output by Compare Match............ 201
Figure 13.13 Example of 0 Output/1 Output Operation ............................................................. 202
Figure 13.14 Example of Toggle Output Operation ................................................................... 203
Figure 13.15 Output Compare Timing........................................................................................204
Figure 13.16 Example of Input Capture Operation Setting Procedure ....................................... 205
Figure 13.17 Example of Input Capture Operation..................................................................... 206
Figure 13.18 Input Capture Signal Timing................................................................................. 207
Figure 13.19 Example of Synchronous Operation Setting Procedure ........................................ 208
Figure 13.20 Example of Synchronous Operation...................................................................... 209
Figure 13.21 Example of PWM Mode Setting Procedure .......................................................... 210
Figure 13.22 Example of PWM Mode Operation (1) ................................................................. 211
Figure 13.23 Example of PWM Mode Operation (2) ................................................................. 212
Figure 13.24 Example of PWM Mode Operation (3) ................................................................. 213
Figure 13.25 Example of PWM Mode Operation (4) ................................................................. 214
Figure 13.26 Example of Reset Synchronous PWM Mode Setting Procedure........................... 216
Figure 13.27 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 1) ......217
Figure 13.28 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 0) ......218
Figure 13.29 Example of Complementar y PWM Mode Setting Procedure...............................220
Figure 13.30 Canceling Procedure of Complementary PWM Mode.......................................... 221