Datasheet

Section 16 Serial Communication Interface 3 (SCI3)
Rev. 2.00 Sep. 23, 2005 Page 290 of 472
REJ09B0160-0200
Serial
clock
Serial
data
Bit 1Bit 0 Bit 7 Bit 0
1 frame 1 frame
Bit 1 Bit 6
Bit 7
TDRE
TEND
LSI
operation
User
processing
TXI interrupt request generated
Data written
to TDR
TDRE flag
cleared
to 0
TXI interrupt
request
generated
TEI interrupt request
generated
Figure 16.10 Example of SCI3 Transmission in Clocked Synchronous Mode