Datasheet

Section 16 Serial Communication Interface 3 (SCI3)
Rev. 2.00 Sep. 23, 2005 Page 300 of 472
REJ09B0160-0200
16.6.2 Multiprocessor Serial Data Reception
Figure 16.17 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR3 is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI3 operations are the same as those in asynchronous mode.
Figure 16.18 shows an example of SCI3 operation for multiprocessor format reception.