Datasheet

Section 2 CPU
Rev. 2.00 Sep. 23, 2005 Page 10 of 472
REJ09B0160-0200
Power-down state
Transition to power-down state by SLEEP instruction
2.1 Address Space and Memory Map
The address space of this LSI is 64 kbytes, which includes the program area and the data area.
Figures 2.1 show the memory map.
H'0000
H'0041
H'0042
H'DFFF
H'FB7F
H'FF7F
H'FF80
H'FB80
H'F77F
H'F780
H'F700
H'EFFF
H'E800
H'FFFF
HD64F36087
(Flash memory version)
Interrupt vector
On-chip ROM
(56 kbytes)
Internal I/O register
Internal I/O register
(1 kbyte work area
for flash memory
programming)
(1 kbyte user area)
On-chip RAM
(2 kbytes)
On-chip RAM
(2 kbytes)
Not used
Not used
H'FB80
H'F77F
H'F700
H'EFFF
H'E800
HD64336082
(Mask-ROM version)
H'0000
H'0041
H'0042
H'FF7F
H'FF80
H'FFFF
H'3FFF
Interrupt vector
Internal I/O register
Internal I/O register
On-chip ROM
(16 kbytes)
On-chip RAM
(2 kbytes)
On-chip RAM
(1 kbytes)
Not used
Not used
Not used
H'FB80
H'F77F
H'F700
H'EFFF
H'E800
HD64336083
(Mask-ROM version)
H'0000
H'0041
H'0042
H'FF7F
H'FF80
H'FFFF
H'5FFF
Interrupt vector
Internal I/O register
Internal I/O register
On-chip ROM
(24 kbytes)
On-chip RAM
(2 kbytes)
On-chip RAM
(1 kbytes)
Not used
Not used
Not used
Figure 2.1 Memory Map (1)