Datasheet

Section 7 ROM
Rev. 1.50 Sep. 18, 2007 Page 120 of 584
REJ09B0240-0150
7.5 Programming/Erasing Protection
There are three types of flash memory programming/erasing protection; hardware protection,
software protection, and error protection.
7.5.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted because of a transition to reset, subactive mode, subsleep mode, or standby
mode. Flash memory control register 1 (FLMCR1), flash memory control register 2 (FLMCR2),
and erase block register 1 (EBR1) are initialized. In a reset via the RES pin, the reset state is not
entered unless the RES pin is held low until oscillation stabilizes after powering on. In the case of
a reset during operation, hold the RES pin low for the RES pulse width specified in the AC
Characteristics section.
7.5.2 Software Protection
Software protection can be implemented against programming/erasing of all flash memory blocks
by clearing the SWE bit in FLMCR1. When software protection is in effect, setting the P or E bit
in FLMCR1 does not cause a transition to programming mode or erasing mode. By setting the
erase block register 1 (EBR1), erase protection can be set for individual blocks. When EBR1 is set
to H'00, erase protection is set for all blocks.
7.5.3 Error Protection
In error protection, an error is detected when CPU runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the programming/erasing
algorithm, and the programming/erasing operation is forcibly aborted. Aborting the
programming/erasing operation prevents damage to the flash memory due to overprogramming or
overerasing.
When the following errors are detected during programming/erasing of flash memory, the FLER
bit in FLMCR2 is set to 1, and the error protection state is entered.
• When the flash memory of the relevant address area is read during programming/erasing
(including vector read and instruction fetch)
• Immediately after exception handling excluding a reset during programming/erasing
• When a SLEEP instruction is executed during programming/erasing