Datasheet

Rev. 1.50 Sep. 18, 2007 Page xix of xxxiv
19.4.3 Input Sampling and A/D Conversion Time .......................................................... 451
19.4.4 External Trigger Input Timing.............................................................................. 452
19.5 A/D Conversion Accuracy Definitions .............................................................................. 453
19.6 Usage Notes ....................................................................................................................... 456
19.6.1 Permissible Signal Source Impedance .................................................................. 456
19.6.2 Influences on Absolute Accuracy ......................................................................... 456
19.6.3 Notes on Analog Pins ........................................................................................... 457
Section 20 Band-Gap Regulator, Power-On Reset (Optional),
and Low-Voltage Detection Circuits (Optional) .............................459
20.1 Features.............................................................................................................................. 460
20.2 Register Descriptions......................................................................................................... 462
20.2.1 Low-Voltage-Detection Control Register (LVDCR)............................................ 462
20.2.2 Low-Voltage-Detection Status Register (LVDSR)............................................... 464
20.3 Operation ........................................................................................................................... 465
20.3.1 Power-On Reset Circuit ........................................................................................ 465
20.3.2 Low-Voltage Detection Circuit............................................................................. 466
Section 21 Power Supply Circuit.......................................................................469
21.1 When Using Internal Power Supply Step-Down Circuit.................................................... 469
21.2 When Not Using Internal Power Supply Step-Down Circuit............................................. 470
Section 22 List of Registers ...............................................................................471
22.1 Register Addresses (Address Order).................................................................................. 472
22.2 Register Bits....................................................................................................................... 481
22.3 Register States in Each Operating Mode ........................................................................... 489
Section 23 Electrical Characteristics .................................................................497
23.1 Absolute Maximum Ratings .............................................................................................. 497
23.2 Electrical Characteristics.................................................................................................... 498
23.2.1 Power Supply Voltage and Operating Ranges...................................................... 498
23.2.2 DC Characteristics ................................................................................................ 500
23.2.3 AC Characteristics ................................................................................................ 508
23.2.4 A/D Converter Characteristics.............................................................................. 513
23.2.5 Watchdog Timer Characteristics........................................................................... 514
23.2.6 Flash Memory Characteristics .............................................................................. 515
23.2.7 Power-Supply-Voltage Detection Circuit Characteristics (Optional) ................... 517
23.2.8 Power-On Reset Circuit Characteristics (Optional).............................................. 518
23.3 Operation Timing............................................................................................................... 518
23.4 Output Load Condition ...................................................................................................... 520