Datasheet

Rev. 1.50 Sep. 18, 2007 Page xxiii of xxxiv
Section 10 Realtime Clock (RTC)
Figure 10.1 Block Diagram of RTC ........................................................................................... 187
Figure 10.2 Definition of Time Expression ................................................................................ 192
Figure 10.3 Initial Setting Procedure.......................................................................................... 195
Figure 10.4 Example: Reading of Inaccurate Time Data............................................................ 196
Section 11 Timer B1
Figure 11.1 Block Diagram of Timer B1.................................................................................... 199
Section 12 Timer V
Figure 12.1 Block Diagram of Timer V...................................................................................... 204
Figure 12.2 Increment Timing with Internal Clock .................................................................... 211
Figure 12.3 Increment Timing with External Clock................................................................... 211
Figure 12.4 OVF Set Timing ...................................................................................................... 211
Figure 12.5 CMFA and CMFB Set Timing ................................................................................ 212
Figure 12.6 TMOV Output Timing ............................................................................................ 212
Figure 12.7 Clear Timing by Compare Match............................................................................ 212
Figure 12.8 Clear Timing by TMRIV Input ............................................................................... 212
Figure 12.9 Pulse Output Example ............................................................................................. 213
Figure 12.10 Example of Pulse Output Synchronized to TRGV Input....................................... 214
Figure 12.11 Contention between TCNTV Write and Clear ...................................................... 215
Figure 12.12 Contention between TCORA Write and Compare Match ..................................... 216
Figure 12.13 Internal Clock Switching and TCNTV Operation.................................................216
Section 13 Timer RC
Figure 13.1 Timer RC Block Diagram ....................................................................................... 219
Figure 13.2 Free-Running Counter Operation ............................................................................ 238
Figure 13.3 Periodic Counter Operation..................................................................................... 239
Figure 13.4 0 and 1 Output Example (TOA = 0, TOB = 1)........................................................ 239
Figure 13.5 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 240
Figure 13.6 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 240
Figure 13.7 Input Capture Operating Example ........................................................................... 241
Figure 13.8 Buffer Operation Example (Input Capture)............................................................. 242
Figure 13.9 PWM Mode Example (1) ........................................................................................ 243
Figure 13.10 PWM Mode Example (2) ...................................................................................... 244
Figure 13.11 Buffer Operation Example (Output Compare) ...................................................... 244
Figure 13.12 PWM Mode Example (TOB, TOC, and TOD = 0: Initial Output Set to 0).......... 245
Figure 13.13 PWM Mode Example (TOB, TOC, and TOD = 1: Initial Output Set to 1).......... 246
Figure 13.14 Block Diagram in PWM2 Mode............................................................................ 248
Figure 13.15 GRD and GRB Buffer Operating Timing in PWM2 Mode (1) ............................. 248
Figure 13.16 GRD and GRB Buffer Operating Timing in PWM2 Mode (2) ............................. 249