Datasheet

Section 13 Timer RC
Rev. 1.50 Sep. 18, 2007 Page 233 of 584
REJ09B0240-0150
13.3.8 Timer RC Output Enable Register (TRCOER)
TRCOER enables or disables the timer outputs. When setting the PTO bit to 1 and driving the
TRCOI signal low, the ED, EC, EB and EA bits are set to 1 and timer RC outputs are disabled.
Bit Bit Name
Initial
Value R/W Description
7 PTO 0 R/W Timer Output Disabled Mode
0: The ED, EC, EV, EA bits are not set to 1 by the low
level input of the TRCOI signal
1: The ED, EC, EV, EA bits are set to 1 by the low level
input of the TRCOI signal
6 to 4 — AII 1 — Reserved
These bits are always read as 1.
3 ED 1 R/W Master Enable D
0: The FTIOD output is enabled according to TRCMR,
TRCIOR0, and TRCIOR1
1: The FTIOD output is disabled regardless of TRCMR,
TRCIOR0, and TRCIOR1 (The FTIOD pin functions as
an I/O port)
2 EC 1 R/W Master Enable C
0: The FTIOC output is enabled according to TRCMR,
TRCIOR0, and TRCIOR1
1: The FTIOC output is disabled regardless of TRCMR,
TRCIOR0, and TRCIOR1 (The FTIOC pin functions as
an I/O port)
1 EB 1 R/W Master Enable B
0: The FTIOB output is enabled according to TRCMR,
TRCIOR0, and TRCIOR1
1: The FTIOB output is disabled regardless of TRCMR,
TRCIOR0, and TRCIOR1 (The FTIOB pin functions as
an I/O port)
0 EA 1 R/W Master Enable A
0: The FTIOA output is enabled according to TRCIOR0
and TRCIOR1
1: The FTIOA output is disabled regardless of TRCIOR0
and TRCIOR1 (The FTIOA pin functions as an I/O
port)