Datasheet

Rev. 1.50 Sep. 18, 2007 Page xxv of xxxiv
Figure 14.16 Example of 0 Output/1 Output Operation ............................................................. 310
Figure 14.17 Example of Toggle Output Operation ................................................................... 311
Figure 14.18 Output Compare Timing........................................................................................311
Figure 14.19 Example of Input Capture Operation Setting Procedure ....................................... 312
Figure 14.20 Example of Input Capture Operation.....................................................................313
Figure 14.21 Input Capture Signal Timing................................................................................. 314
Figure 14.22 Example of Synchronous Operation Setting Procedure ........................................ 315
Figure 14.23 Example of Synchronous Operation...................................................................... 316
Figure 14.24 Example of PWM Mode Setting Procedure .......................................................... 317
Figure 14.25 Example of PWM Mode Operation (1) ................................................................. 318
Figure 14.26 Example of PWM Mode Operation (2) ................................................................. 319
Figure 14.27 Example of PWM Mode Operation (3) ................................................................. 320
Figure 14.28 Example of PWM Mode Operation (4) ................................................................. 321
Figure 14.29 Example of Reset Synchronous PWM Mode Setting Procedure........................... 323
Figure 14.30 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 1) ...... 324
Figure 14.31 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 0) ...... 325
Figure 14.32 Example of Complementary PWM Mode Setting Procedure................................ 327
Figure 14.33 Canceling Procedure of Complementary PWM Mode.......................................... 327
Figure 14.34 Example of Complementary PWM Mode Operation (1)....................................... 328
Figure 14.35 Example of Complementary PWM Mode Operation (2)....................................... 329
Figure 14.36 Timing of Overshooting ........................................................................................ 330
Figure 14.37 Timing of Undershooting ...................................................................................... 330
Figure 14.38 Block Diagram in PWM3 Mode............................................................................ 333
Figure 14.39 Flowchart of Setting in PWM3 Mode ................................................................... 334
Figure 14.40 Example of Non-Overlap Pulses ........................................................................... 335
Figure 14.41 Compare Match Buffer Operation......................................................................... 336
Figure 14.42 Input Capture Buffer Operation............................................................................. 337
Figure 14.43 Example of Buffer Operation Setting Procedure................................................... 338
Figure 14.44 Example of Buffer Operation (1)
(Buffer Operation for Output Compare Register) ................................................. 339
Figure 14.45 Example of Compare Match Timing for Buffer Operation ................................... 340
Figure 14.46 Example of Buffer Operation (2)
(Buffer Operation for Input Capture Register) ...................................................... 341
Figure 14.47 Input Capture Timing of Buffer Operation............................................................ 341
Figure 14.48 Buffer Operation (3)
(Buffer Operation in Complementary PWM Mode CMD1 = CMD0 = 1)............ 342
Figure 14.49 Buffer Operation (4)
(Buffer Operation in Complementary PWM Mode CMD1 =1, CMD0 = 0) ......... 343
Figure 14.50 Example of Output Disable Timing of Timer RD by Writing to TRDOER1........ 344
Figure 14.51 Example of Output Disable Timing of Timer RD by External Trigger................. 344