Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 16-Bit 20 MHz I/O number 79

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Section 13 Timer RC

Rev. 1.50 Sep. 18, 2007 Page 245 of 584

REJ09B0240-0150

Figures 13.12 and 13.13 show examples of the output of PWM waveforms with duty cycles of 0%

and 100%.

TRCCNT

GRA

H'0000

FTIOB

Time

GRB

Duty cycle 0%

GRB changed

TRCCNT

GRA

H'0000

FTIOB

Time

GRB

Duty cycle 100%

GRB changed

TRCCNT

GRA

H'0000

FTIOB

Time

GRB

Duty cycle 100%

GRB changed

Duty cycle 0%

GRB changed

Output levels of FTIOB are not changed when compare

matches of cycle register and duty cycle register occur

simultaneously.

Output levels of FTIOB are not changed when compare

matches of cycle register and duty cycle register occur

simultaneously.

Figure 13.12 PWM Mode Example

(TOB, TOC, and TOD = 0: Initial Output Set to 0)