Datasheet

Section 13 Timer RC
Rev. 1.50 Sep. 18, 2007 Page 252 of 584
REJ09B0240-0150
The following is an example of operation when TRCCNT starts counting by the TRGC input and
the one-shot pulse waveform is output in PWM2 mode. When the falling edge of the TRGC input
is selected by TRCCR2 (setting the TCEG1 bit to 1 and clearing the TCEG0 bit to 0), TRCCNT is
set to counting-up on compare match A of GRA (setting the CSTP bit in TRCCR2 to 1), TRCCNT
is cleared on compare match A (setting the CCLR bit in TRCCR1 to 1), and the initial value of the
output signal is set to 0 by TRCCR1 (clearing the TOB bit to 0), TRCCNT starts counting at the
falling edge of FTIOA/TRGC after the CTS bit in TRCMR has been set to 1. Then, TRCCNT is
cleared to H'0000 on a compare match of GRA and stops counting, and the one-shot pulse
waveform is output. Figure 13.21 shows such an example.
The value of TRCCNT
H'FFFF
H'0000
GRA
GRB
GRC
CTS
FTIOA/TRGC
High
FTIOB
Time
Figure 13.21 Example (2) of Output Operation of One-Shot Pulse Waveform
in PWM2 Mode