Datasheet

Section 14 Timer RD
Rev. 1.50 Sep. 18, 2007 Page 270 of 584
REJ09B0240-0150
ITMRD0
FTIOD0
FTIOC0
FTIOB0
FTIOA0
TRDCNT_0
GRA_0 GRB_0
GRC_0 GRD_0
TRDCR_0
TRDIORA_0
TRDSR_0
TRDIORC_0
TRDIER_0
TRDDF_0
TRDCNT_0:
GRA_0, GRB_0,
GRC_0, GRD_0:
TRDCR_0:
TRDIORA_0:
TRDIORC_0:
TRDSR_0:
TRDIER_0:
POCR_0:
TRDDF_0:
ITMRD0:
Timer RD counter_0 (16 bits)
General registers A_0, B_0, C_0, and D_0
(input capture/output compare registers: 16 bits × 4)
Timer RD control register_0 (8 bits)
Timer RD I/O control register A_0 (8 bits)
Timer RD I/O control register C_0 (8 bits)
Timer RD status register_0 (8 bits)
Timer RD interrupt enable register_0 (8 bits)
PWM mode output level control register_0 (8 bits)
Timer RD digital filtering function select register_0 (8 bits)
Channel 0 interrupt
[Legend]
φ, φ/2,
φ/4, φ/8,
φ/32, φ40M
Clock select
Control logic
Module data bus
Comparator
TRDOI_
0
POCR_0
Figure 14.2 Timer RD (Channel 0) Block Diagram