Datasheet

Section 14 Timer RD
Rev. 1.50 Sep. 18, 2007 Page 299 of 584
REJ09B0240-0150
14.3.16 Interface with CPU
(1) 16-Bit Register
TRDCNT and GR are 16-bit registers. Reading/writing in a 16-bit unit is enabled but disabled in
an 8-bit unit since the data bus with the CPU is 16-bit width. These registers must always be
accessed in a 16-bit unit. Figure 14.8 shows an example of accessing the 16-bit registers.
H
Internal data bus
Bus interface
Module data bus
C
P
U
L
TRDCNTLTRDCNTH
Figure 14.8 Accessing Operation of 16-Bit Register (between CPU and TRDCNT (16 bits))
(2) 8-Bit Register
Registers other than TRDCNT and GR are 8-bit registers that are connected internally with the
CPU in an 8-bit width. Figure 14.9 shows an example of accessing the 8-bit registers.
TRDSTR
H
Internal data bus
Bus interface
Module data bus
C
P
U
L
Figure 14.9 Accessing Operation of 8-Bit Register (between CPU and TRDSTR (8 bits))