Datasheet

Rev. 1.50 Sep. 18, 2007 Page xxxiii of xxxiv

Table 17.4 Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 382

Table 17.5 Examples of BRR Settings for Various Bit Rates (Clock Synchronous Mode).......... 382

Table 17.6 SSR Status Flags and Receive Data Handling ......................................................388

Table 17.7 SCI3 Interrupt Requests........................................................................................ 403

Section 18 I

C Bus Interface 2 (IIC2)

Table 18.1 Pin Configuration.................................................................................................. 409

Table 18.2 Transfer Rate ........................................................................................................ 412

Table 18.3 Interrupt Requests ................................................................................................. 440

Table 18.4 Time for Monitoring SCL..................................................................................... 441

Section 19 A/D Converter

Table 19.1 Pin Configuration.................................................................................................. 445

Table 19.2 Analog Input Channels and Corresponding ADDR Registers .............................. 446

Table 19.3 A/D Conversion Time (Single Mode)................................................................... 452

Section 20 Band-Gap Regulator, Power-On Reset (Optional), and Low-Voltage Detection

Circuits (Optional)

Table 20.1 LVDCR Settings and Select Functions................................................................. 463

Section 23 Electrical Characteristics

Table 23.1 Absolute Maximum Ratings ................................................................................. 497

Table 23.2 DC Characteristics (1)...........................................................................................500

Table 23.2 DC Characteristics (2)...........................................................................................507

Table 23.3 AC Characteristics ................................................................................................ 508

Table 23.4 I

C Bus Interface Timing...................................................................................... 511

Table 23.5 Serial Communication Interface (SCI) Timing..................................................... 512

Table 23.6 A/D Converter Characteristics.............................................................................. 513

Table 23.7 Watchdog Timer Characteristics........................................................................... 514

Table 23.8 Flash Memory Characteristics .............................................................................. 515

Table 23.9 Power-Supply-Voltage Detection Circuit Characteristics..................................... 517

Table 23.10 Power-On Reset Circuit Characteristics............................................................ 518

Appendix

Table A.1 Instruction Set....................................................................................................... 523

Table A.2 Operation Code Map (1) ....................................................................................... 536

Table A.2 Operation Code Map (2) ....................................................................................... 537

Table A.2 Operation Code Map (3) ....................................................................................... 538

Table A.3 Number of Cycles in Each Instruction.................................................................. 540

Table A.4 Number of Cycles in Each Instruction.................................................................. 541

Table A.5 Combinations of Instructions and Addressing Modes .......................................... 550