Datasheet

Section 14 Timer RD
Rev. 1.50 Sep. 18, 2007 Page 319 of 584
REJ09B0240-0150
Figure 14.26 shows another example of operation in PWM mode. The output signals go to 0 and
TRDCNT is reset at compare match A, and the output signals go to 1 at compare match B, C, and
D (TOB, TOC, and TOD = 0, POLB, POLC, and POLD = 1).
GRA
GRB
GRC
GRD
H'0000
FTIOC
FTIOD
FTIOB
Counter cleared by GRA compare match
Time
TRDCNT value
Figure 14.26 Example of PWM Mode Operation (2)