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ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 16-Bit 20 MHz I/O number 79
351352353354355356357358359360
Section 14 Timer RD
Rev. 1.50 Sep. 18, 2007 Page 321 of 584
REJ09B0240-0150
GRA
GRB
H'0000
FTIOB
GRA
GRB
H'0000
FTIOB
GRA
GRB
H'0000
FTIOB
TRDCNT value
0% duty
Time
GRB rewritten
GRB
rewritten
Time
TRDCNT value
GRB rewritten
GRB
rewritten
GRB rewritten
100% duty
0% duty
Time
TRDCNT value
GRB rewritten
GRB rewritten
GRB rewritten
100% duty
When cycle register and duty register compare matches
occur simultaneously, duty register compare match has
priority.
When cycle register and duty register compare matches
occur simultaneously, duty register compare match has
priority.
Figure 14.28 Example of PWM Mode Operation (4)