Datasheet

Section 14 Timer RD

Rev. 1.50 Sep. 18, 2007 Page 322 of 584

REJ09B0240-0150

14.4.6 Reset Synchronous PWM Mode

Three normal- and counter-phase PWM waveforms are output by combining channels 0 and 1 that

one of changing points of waveforms will be common.

In reset synchronous PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become

PWM-output pins automatically. TRDCNT_0 performs an increment operation. Tables 14.5 and

14.6 show the PWM-output pins used and the register settings, respectively.

Figure 14.29 shows the example of reset synchronous PWM mode setting procedure.

Table 14.5 Output Pins in Reset Synchronous PWM Mode

Channel Pin Name Input/Output Pin Function

0 FTIOC0 Output Toggle output in synchronous with PWM cycle

0 FTIOB0 Output PWM output 1

0 FTIOD0 Output PWM output 1 (counter-phase waveform of PWM

output 1)

1 FTIOA1 Output PWM output 2

1 FTIOC1 Output PWM output 2 (counter-phase waveform of PWM

output 2)

1 FTIOB1 Output PWM output 3

1 FTIOD1 Output PWM output 3 (counter-phase waveform of PWM

output 3)

Table 14.6 Register Settings in Reset Synchronous PWM Mode

TRDCNT_0 Initial setting of H'0000

TRDCNT_1 Not used (independently operates)

GRA_0 Sets counter cycle of TRDCNT_0

GRB_0 Set a changing point of the PWM waveform output from pins FTIOB0 and

FTIOD0.

GRA_1 Set a changing point of the PWM waveform output from pins FTIOA1 and

FTIOC1.

GRB_1 Set a changing point of the PWM waveform output from pins FTIOB1 and

FTIOD1.