Datasheet

Section 14 Timer RD
Rev. 1.50 Sep. 18, 2007 Page 330 of 584
REJ09B0240-0150
In complementary PWM mode, when the counter switches from up-counter to down-counter or
vice versa, TRDCNT_0 and TRDCNT_1 overshoots or undershoots, respectively. In this case, the
conditions to set the IMFA flag in channel 0 and the UDF flag in channel 1 differ from usual
settings. Also, the transfer conditions in buffer operation differ from usual settings. Such timings
are shown in figures 14.36 and 14.37.
GR
Buffer transfer
signal
Set to 1
Flag is not set
Transferred
to buffer
Not transferred
to buffer
N+1
GRA_0
TRDCNT
N
N-1 N-1N
N
IMFA
Figure 14.36 Timing of Overshooting
H'FFFFH'0001 H'0001H'0000H'0000
GR
UDF
TRDCNT
Buffer transfer
signal
Set to 1
Flag is not set
Transferred
to buffer
Not transferred
to buffer
Figure 14.37 Timing of Undershooting