Datasheet

Section 3 Exception Handling
Rev. 1.50 Sep. 18, 2007 Page 47 of 584
REJ09B0240-0150
Related Module Exception Sources
Vector
Number Vector Address ICR Priority
 Reserved for system use 25 to 28 H'000064 to H'000073  High
Timer B1 Overflow 29 H'000074 to H'000077 ICRC7
 Reserved for system use 30, 31 H'000078 to H'00007F 
SCI3_2 Receive data full
Transmit data empty
Transmit end
Receive error
32 H'000080 to H'000083 ICRC4
 Reserved for system use 33 H'000084 to H'000087 
SCI3_3 Receive data full
Transmit data empty
Transmit end
Receive error
34 H'000088 to H'00008B ICRC2
Timer RC Input capture A/compare match A
Input capture B/compare match B
Input capture C/compare match C
Input capture D/compare match D
Overflow
35 H'00008C to H'00008F ICRC1
A/D converter A/D conversion end 36 H'000090 to H'000093 ICRC0
Timer RD_0 Compare match/input capture A0 to D0
Overflow
37 H'000094 to H'000097 ICRD7
Timer RD_1 Compare match/input capture A1 to D1
Overflow
38 H'000098 to H'00009B ICRD6
Timer RD_2 Compare match/input capture A2 to D2
Overflow
39 H'00009C to H'00009F ICRD5
Timer RD_3 Compare match/input capture A3 to D3
Overflow
40 H'0000A0 to H'0000A3 ICRD4
Clock switching When the system clock sources are
switched from the external-input
signal to the internal-generated
signal
41 H'0000A4 to H'0000A7 ICRD3
Low
Note: * A low-voltage detection interrupt is available only in the product with an on-chip power-
on reset and low-voltage detection circuit.