Datasheet

Section 5 Clock Pulse Generators
Rev. 3.00 Sep. 14, 2006 Page 73 of 408
REJ09B0105-0300
Bit Bit Name
Initial
Value R/W Description
4 TRMDRWE 0 R/W Trimming Date Register Write Enable
This register can be written to when the LOCKDW bit is 0
and this bit is 1.
[Setting condition]
• When writing 0 to the WRI bit while writing 1 to the
TRMDRWE bit while the PRWE bit is 1
[Clearing conditions]
• Reset
• When writing 0 to the WRI bit and writing 0 to the
TRMDRWE bit while the PRWE bit is 1
3 to 0  All 1  Reserved
These bits are always read as 1
5.2.3 RC Trimming Data Register (RCTRMDR)
RCTRMDR stores the trimming data of the on-chip oscillator frequency.
Bit Bit Name
Initial
Value R/W Description
7 TRMD7 (0)* R/W
6 TRMD6 (0)* R/W
5 TRMD5 (0)* R/W
4 TRMD4 (0)* R/W
3 TRMD3 (0)* R/W
2 TRMD2 (0)* R/W
1 TRMD1 0 R
0 TRMD0 0 R
Trimming Data
In the flash memory version, the trimming data is loaded
from the flash memory to this register right after a reset.
These bits are always read as undefined value.
As for the masked ROM version, the on-chip oscillator
frequency can be trimmed by rewriting these bits. The
frequency generated in the on-chip oscillator changes
right after rewriting these bits. These bits are initialized to
H'00.
Frequency variation is expressed as follows (the TRMD7
bit is a sign bit):
(Min.) H'80 ← H'FC ← H'00 →H'04 → H'7C (Max.)
Note: * The initial value differs from product to product in the flash memory version.