Datasheet

Section 6 Power-Down Modes
LPW3003A_000020020200 Rev. 3.00 Sep. 14, 2006 Page 85 of 408
REJ09B0105-0300
Section 6 Power-Down Modes
For operating modes after a reset, this LSI has not only a normal active mode but also three
power-down modes in which power consumption is significantly reduced. In addition, there is also
a module standby function which reduces power consumption by individually stopping on-chip
peripheral modules.
Active mode
The CPU and all on-chip peripheral modules are operable on the system clock. The system
clock frequency can be selected from φosc, φosc/8, φosc/16, φosc/32, and φosc/64.
Sleep mode
The CPU halts. On-chip peripheral modules are operable on the system clock.
Standby mode
The CPU and all on-chip peripheral modules halt.
Subsleep mode
The CPU and all on-chip peripheral modules halt. I/O ports keep the same states as before the
transition.
Module standby function
Independent of the above modes, power consumption can be reduced by halting on-chip
peripheral modules that are not used in module units.
6.1 Register Descriptions
The registers related to power-down modes are listed below.
System control register 1 (SYSCR1)
System control register 2 (SYSCR2)
Module standby control register 1 (MSTCR1)
Module standby control register 2 (MSTCR2)