Datasheet

Section 9 I/O Ports

Rev. 3.00 Sep. 14, 2006 Page 124 of 408

REJ09B0105-0300

9.3 Port 5

Port 5 is a general I/O port also functioning as an I

C bus interface I/O pin*, A/D trigger input pin,

and wakeup interrupt input pin. Each pin of the port 5 is shown in figure 9.3. The register setting

of the I

C bus interface has priority for functions of the P57/SCL and P56/SDA pins.

Note: * Supported only by the H8/36912 Group.

P57/SCL

P56/SDA

P55/WKP5/ADTR

Port 5

Figure 9.3 Port 5 Pin Configuration

Port 5 has the following registers.

• Port mode register 5 (PMR5)

• Port control register 5 (PCR5)

• Port data register 5 (PDR5)

• Port pull-up control register 5 (PUCR5)