Datasheet

Section 16 A/D Converter
Rev. 3.00 Sep. 14, 2006 Page 275 of 408
REJ09B0105-0300
16.2 Input/Output Pins
Table 16.1 summarizes the input pins used by the A/D converter.
Table 16.1 Pin Configuration
Pin Name Symbol I/O Function
Analog power supply pin AV
CC
Input Analog block power supply pin
Analog input pin 0 AN0 Input
Analog input pin 1 AN1 Input
Analog input pin 2 AN2 Input
Analog input pin 3 AN3 Input
Analog input pins
A/D external trigger input pin ADTRG Input External trigger input pin for starting A/D
conversion
16.3 Register Description
The A/D converter has the following registers.
• A/D data register A (ADDRA)
• A/D data register B (ADDRB)
• A/D data register C (ADDRC)
• A/D data register D (ADDRD)
• A/D control/status register (ADCSR)
• A/D control register (ADCR)
16.3.1 A/D Data Registers A to D (ADDRA to ADDRD)
There are four 16-bit read-only ADDR registers; ADDRA to ADDRD, used to store the results of
A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown
in table 16.2.
The converted 10-bit data is stored in bits 6 to 15. The lower 6 bits are always read as 0.
The data bus between the CPU and the A/D converter is 8 bits wide. The upper byte can be read
directly from the CPU, however the lower byte should be read via a temporary register. The
temporary register contents are transferred from the ADDR when the upper byte data is read.