Datasheet

Section 19 List of Registers
Rev. 3.00 Sep. 14, 2006 Page 302 of 408
REJ09B0105-0300
19.1 Register Addresses (Address Order)
The data bus width indicates the numbers of bits by which the register is accessed.
The number of access states indicates the number of states based on the specified reference clock.
Register Name
Abbre-
viation
Bit
No Address
Module
Name
Data Bus
Width
Access
State
Low-voltage-detection control
register
LVDCR 8 H'F730 Low-voltage
detection
circuit
8 2
Low-voltage-detection status
register
LVDSR 8 H'F731 Low-voltage
detection
circuit
8 2
Clock control status register CKCSR 8 H'F734 Clock
oscillator
8 2
RC control register RCCR 8 H'F735 On-chip
oscillator
8 2
RC trimming data protect register RCTRMDPR 8 H'F736 On-chip
oscillator
8 2
RC trimming data register RCTRMDR 8 H'F737 On-chip
oscillator
8 2
I
2
C bus control register 1 ICCR1 8 H'F748 IIC2 8 2
I
2
C bus control register 2 ICCR2 8 H'F749 IIC2 8 2
I
2
C bus mode register ICMR 8 H'F74A IIC2 8 2
I
2
C bus interrupt enable register ICIER 8 H'F74B IIC2 8 2
I
2
C bus status register ICSR 8 H'F74C IIC2 8 2
Slave address register SAR 8 H'F74D IIC2 8 2
I
2
C bus transmit data register ICDRT 8 H'F74E IIC2 8 2
I
2
C bus receive data register ICDRR 8 H'F74F IIC2 8 2
Timer mode register B1 TMB1 8 H'F760 Timer B1 8 2
Timer counter B1/Timer load
register B1
TCB1(R)/
TLB1 (W)
8 H'F761 Timer B1 8 2
Timer mode register W TMRW 8 H'FF80 Timer W 8 2
Timer control register W TCRW 8 H'FF81 Timer W 8 2
Timer interrupt enable register W TIERW 8 H'FF82 Timer W 8 2
Timer status register W TSRW 8 H'FF83 Timer W 8 2