Datasheet
Rev. 3.00 Sep. 14, 2006 Page 400 of 408
REJ09B0105-0300
Item Page Revision (See Manual for Details)
Figure 1.1 Internal Block
Diagram of H8/36912 Group
Figure 1.2 Internal Block
Diagram of H8/36902 Group
3, 4
PC0/OSC1
PC1/OSC2/CLKOUT
V
CL
VSS
VCC
RES
TEST
NMI
AV
CC
E10T_0*
E10T_1*
E10T_2*
CPU
H8/300H
Data bus (lower)
Port C
PB3/AN3/ExtU
PB2/AN2/ExtD
PB1/AN1
PB0/AN0
Port B
On-chip
oscillator
(OSC1)
(OSC2)
System
clock
generator
Note: * Can also be used for the E7 or E8 emulator.
bus (upper)
Address bus
Figure 1.3 Pin Arrangement
of H8/36912 Group (FP-32A)
Figure 1.4 Pin Arrangement
of H8/36902 Group (FP-32A)
5, 6
28
29
30
31
32
P76/TMOV
PB3/AN3/ExtU
PB2/AN2/ExtD
PB1/AN1
PB0/AN0
E10T_2*
E10T_1*
E10T_0*
P17/IRQ3/TRGV
NMI
13
12
11
10
9
H8/36912 Group
(Top view)
V
CL
PC0/OSC1
PC1/OSC2/CLKOUT
Vss
TEST
RES
Vcc
AVcc
1
2
3
4
5
6
7
8
Note: * Can also be used for the E7 or E8 emulator.
Figure 1.5 Pin Arrangement
of H8/36912 Group (FP-32D,
32P4B),
Figure 1.6 Pin Arrangement
of H8/36902 Group (FP-32D,
32P4B)
7, 8
P57/SCL
E10T_2*
E10T_0*
E10T_1*
18
17
15
16
Note: * Can also be used for the E7 or E8 emulator.
Pin No.
Type Symbol FP-32D, 32P4B FP-32A Functions
E7, E8 E10T_0,
E10T_1,
E10T_2
15, 16, 17 11, 12,
13
Interface pins
for the E7 or E8
emulator
Table 1.1 Pin Functions 9, 10
Section 2 CPU 11
• High-speed operation
All frequently-used instructions execute in two or four states
Figure 2.1 Memory Map (1) 12
H8/36912F
H8/36902F
(Flash memory version)
Interrupt vector
Not used
E7 or E8 control
program area
(4 kbytes)
(E7 or E8 work area,
for flash memory
programming:
1 kbyte)
H'0000
H'0045
H'0046
H'1FFF
H'F980
H'2000
H'2FFF
H'0000
H'0045
H'0046
H'1FFF
H8/36912
H8/36902
(Masked ROM version
(under planning))
Interrupt vector
Not used
Not used