Datasheet

Section 2 CPU
Rev. 3.00 Sep. 14, 2006 Page 41 of 408
REJ09B0105-0300
(1) Bit Manipulation for Two Registers Assigned to the Same Address
Example 1: Bit manipulation for the timer load register and timer counter
(Applicable to timer B1, not available for the H8/36902 Group.)
Figure 2.13 shows an example of a timer in which two timer registers are assigned to the same
address. When a bit manipulation instruction accesses the timer load register and timer counter of
a reloadable timer, since these two registers share the same address, the following operations takes
place.
1. Data is read in byte units.
2. The CPU sets or resets the bit to be manipulated with the bit manipulation instruction.
3. The written data is written again in byte units to the timer load register.
The timer is counting, so the value read is not necessarily the same as the value in the timer load
register. As a result, bits other than the intended bit in the timer counter may be modified and the
modified value may be written to the timer load register.
Read
Write
Count clock Timer counter
Timer load register
Reload
Internal bus
Figure 2.13 Example of Timer Configuration with Two Registers Allocated to
Same Address