Datasheet

Section 5 Clock Pulse Generators
CPG0200A_000020020200 Rev. 3.00 Sep. 14, 2006 Page 69 of 408
REJ09B0105-0300
Section 5 Clock Pulse Generators
Clock oscillator circuitry (CPG: clock pulse generator) consists of an external oscillator, an on-
chip oscillator, a duty correction circuit, a clock select circuit, and system clock dividers.
Figure 5.1 shows a block diagram of the clock pulse generator.
System
clock
oscillator
Duty
correction
circuit
System
clock
divider
Prescaler S
(13 bits)
OSC1
OSC2
φ
OSC
φ
OSC
φ/2
to
φ/8192
φ
φ/8
φ
φ/16
φ/32
φ/64
On-chip
oscillator
Clock
select
circuit
Clock
divider
R OSC
R OSC
φ
φ
RC
R OSC
/2
R OSC
/4
Figure 5.1 Block Diagram of Clock Pulse Generators
The system clock (φ) is a basic clock on which the CPU and on-chip peripheral modules operate.
The system clock is divided into φ/2 to φ/8192 by prescaler S and the divided clocks are supplied
to respective peripheral modules.