Datasheet

Table Of Contents
Section 4 Interrupt Controller
Rev. 2.00 Jul. 04, 2007 Page 61 of 692
REJ09B0309-0200
4.3.1 Interrupt Edge Select Register (IEGR)
IEGR selects the sense of an edge that generates interrupt requests of the NMI, TMIF, ADTRG,
IRQ4, IRQ3, IRQ1, and IRQ0 pins.
Bit Bit Name
Initial
Value
R/W Descriptions
7 NMIEG 0 R/W NMI Edge Select
0: Detects a falling edge of the NMI pin input
1: Detects a rising edge of the NMI pin input
6 TMIFEG 0 R/W TMIF Edge Select
0: Detects a falling edge of the TMIF pin input
1: Detects a rising edge of the TMIF pin input
5 ADTRGNEG 0 R/W ADTRG Edge Select
0: Detects a falling edge of the ADTRG pin input
1: Detects a rising edge of the ADTRG pin input
4 IEG4 0 R/W IRQ4 Edge Select
0: Detects a falling edge of the IRQ4 pin input
1: Detects a rising edge of the IRQ4 pin input
3 IEG3 0 R/W IRQ3 Edge Select
0: Detects a falling edge of the IRQ3 pin input
1: Detects a rising edge of the IRQ3 pin input
2 1 Reserved
This bit is always read as 1 and cannot be modified.
1 IEG1 0 R/W IRQ1 Edge Select
0: Detects a falling edge of the IRQ1 pin input
1: Detects a rising edge of the IRQ1 pin input
0 IEG0 0 R/W IRQ0 Edge Select
0: Detects a falling edge of the IRQ0 pin input
1: Detects a rising edge of the IRQ0 pin input