Datasheet

Section 5 Clock Pulse Generator
Rev. 2.00 Jul. 04, 2007 Page 99 of 692
REJ09B0309-0200
5.5.5 Note on the Oscillation Stabilization of Resonators
When a microcontroller operates, the internal power supply potential fluctuates slightly in
synchronization with the system clock. Depending on the individual resonator characteristics, the
oscillation waveform amplitude may not be sufficiently large immediately after the oscillation
stabilization wait time, making the oscillation waveform susceptible to influence by fluctuations in
the power supply potential. In this state, the oscillation waveform may be disrupted, leading to an
unstable system clock and incorrect operation of the microcontroller.
If incorrect operation occurs, change the setting of the standby timer select bits 3 to 0 (STS3 to
STS0) (bit 0 in the system control register 3 (SYSCR3) and bits 6 to 4 in the system control
register 1 (SYSCR1)) to give a longer wait time.
For example, if incorrect operation occurs with a wait time setting of 1,024 states, check the
operation with a wait time setting of 2,048 states or more. If the same kind of incorrect operation
occurs after a reset as after a state transition, hold the RES pin low for a longer period.
5.5.6 Note on Using On-Chip Power-On Reset
The power-on reset circuit in this LSI adjusts the reset clear time by the capacitor capacitance,
which is externally connected to the RES pin. The external capacitor capacitance should be
adjusted to secure the oscillation stabilization time before reset clearing. For details, refer to
section 23, Power-On Reset Circuit.
5.5.7 Note on Using the On-Chip Emulator
When using the on-chip emulator, programming and erasure of the flash memory require an
accurate system clock signal. The frequency of the on-chip oscillator for the system clock varies
according to voltage and temperature conditions. Thus, when the on-chip emulator is in use, a
resonator must be connected between the OSC1 and OSC2 pins or an external clock signal must
be supplied. In this case, the on-chip emulator is driven by the on-chip oscillator for the system
clock in the execution of user programs, and by the system clock oscillator in the programming
and erasure of the flash memory. This selection is achieved by fixing the level of the IRQAEC pin
to the low level during the reset period of the on-chip emulator.