Datasheet

Section 10 Realtime Clock (RTC)
Rev. 2.00 Jul. 04, 2007 Page 221 of 692
REJ09B0309-0200
10.3.8 RTC Interrupt Flag Register (RTCFLG)
RTCFLG sets the corresponding flag when an interrupt occurs. Each flag is not cleared
automatically even if the interrupt is accepted. To clear the flag, 0 should be written to the flag.
Bit Bit Name
Initial
Value
R/W Description
7 FOIFG /(0)*
2
R/W*
1
[Setting condition]
A free running counter overflows
[Clearing condition]
0 is written to FOIFG when FOIFG = 1
6 WKIFG /(0)*
2
R/W*
1
[Setting condition]
A week periodic interrupt occurs
[Clearing condition]
0 is written to WKIFG when WKIFG = 1
5 DYIFG /(0)*
2
R/W*
1
[Setting condition]
A day periodic interrupt occurs
[Clearing condition]
0 is written to DYIFG when DYIFG = 1
4 HRIFG /(0)*
2
R/W*
1
[Setting condition]
An hour periodic interrupt occurs
[Clearing condition]
0 is written to HRIFG when HRIFG = 1
3 MNIFG /(0)*
2
R/W*
1
[Setting condition]
A minute periodic interrupt occurs
[Clearing condition]
0 is written to MNIFG when MNIFG = 1
2 SEIFG /(0)*
2
R/W*
1
[Setting condition]
A one-second periodic interrupt occurs
[Clearing condition]
0 is written to SEIFG when SEIFG = 1
1 05SEIFG /(0)*
2
R/W*
1
[Setting condition]
A 0.5-second periodic interrupt occurs
[Clearing condition]
0 is written to 05SEIFG when 05SEIFG = 1
0 025SEIFG /(0)*
2
R/W*
1
[Setting condition]
A 0.25-second periodic interrupt occurs
[Clearing condition]
0 is written to 025SEIFG when 025SEIFG = 1
Notes: 1. Only 0 can be written here, to clear the flag.
2. This is the initial value after a reset by the RST bit in RTCCR1.