Datasheet

Section 12 Timer F
Rev. 2.00 Jul. 04, 2007 Page 241 of 692
REJ09B0309-0200
Bit Bit Name
Initial
Value
R/W Description
5 OVIEH 0 R/W Timer Overflow Interrupt Enable H
Selects enabling or disabling of interrupt generation
when TCFH overflows.
0: TCFH overflow interrupt request is disabled
1: TCFH overflow interrupt request is enabled
4 CCLRH 0 R/W Counter Clear H
In 16-bit mode, this bit selects whether TCF is cleared
when TCF and OCRF match. In 8-bit mode, this bit
selects whether TCFH is cleared when TCFH and
OCRFH match.
In 16-bit mode:
0: TCF clearing by compare match is disabled
1: TCF clearing by compare match is enabled
In 8-bit mode:
0: TCFH clearing by compare match is disabled
1: TCFH clearing by compare match is enabled
3 OVFL 0 R/(W)* Timer Overflow Flag L
This is a status flag indicating that TCFL has
overflowed.
[Setting condition]
TCFL overflows from H'FF to H'00
[Clearing condition]
Writing of 0 to bit OVFL after reading OVFL = 1
2 CMFL 0 R/(W)* Compare Match Flag L
This is a status flag indicating that TCFL has matched
OCRFL.
[Setting condition]
The TCFL value matches the OCRFL value
[Clearing condition]
Writing of 0 to bit CMFL after reading CMFL = 1