Datasheet

Section 13 Timer G
Rev. 2.00 Jul. 04, 2007 Page 267 of 692
REJ09B0309-0200
No.
Clock Levels Before and After
Modifying Bits CKS1 and CKS0 TCG Operation
3 Goes from high level to low level
*
TCG N N+1
N+2
Clock before
switching
Clock after
switching
Count
clock
Write to CKS1 and CKS0
4 Goes from high level to high level
TCG N N+1 N+2
Clock before
switching
Clock after
switching
Count
clock
Write to CKS1 and CKS0
Note: * The switchover is seen as a falling edge, and TCG is incremented.
13.7.2 Notes on Port Mode Register Modification
The following points should be noted when a port mode register is modified to switch the input
capture function or the input capture input noise canceller function.
• Switching input capture input pin function
Note that when the pin function is switched by modifying TMIG in the port mode register F
(PMRF), which performs input capture input pin control, an edge will be regarded as having
been input at the pin even though no valid edge has actually been input. Input capture input
signal input edges, and the conditions for their occurrence, are summarized in table 13.4.