Datasheet

Rev. 2.00 Jul. 04, 2007 Page xxix of xl
Figure 17.2 Data Format in Asynchronous Communication ...................................................... 378
Figure 17.3 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode) (Example with 8-Bit Data, Parity, Two Stop Bits)............. 379
Figure 17.4 Sample SCI3 Initialization Flowchart......................................................................383
Figure 17.5 Example SCI3 Operation in Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ...........................................................................384
Figure 17.6 Sample Serial Transmission Flowchart (Asynchronous Mode)...............................385
Figure 17.7 Example SCI3 Operation in Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ...........................................................................387
Figure 17.8 Sample Serial Data Reception Flowchart (Asynchronous Mode) (1)...................... 388
Figure 17.8 Sample Serial Data Reception Flowchart (Asynchronous Mode) (2)...................... 389
Figure 17.9 Data Format in Clock Synchronous Communications.............................................390
Figure 17.10 Example of SCI3 Operation in Transmission in Clock Synchronous Mode.......... 391
Figure 17.11 Sample Serial Transmission Flowchart (Clock Synchronous Mode).....................392
Figure 17.12 Example of SCI3 Reception Operation in Clock Synchronous Mode ...................393
Figure 17.13 Sample Serial Reception Flowchart (Clock Synchronous Mode).......................... 394
Figure 17.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clock Synchronous Mode)...................................................................................395
Figure 17.15 Example of Communication Using Multiprocessor Format (Transmission of
Data H'AA to Receiving Station A) ...................................................................... 397
Figure 17.16 Sample Multiprocessor Serial Transmission Flowchart......................................... 398
Figure 17.17 Sample Multiprocessor Serial Reception Flowchart (1) ........................................ 399
Figure 17.18 Example of SCI3 Operation in Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit).............................. 400
Figure 17.19 IrDA Block Diagram ............................................................................................. 401
Figure 17.20 IrDA Transmission and Reception ........................................................................402
Figure 17.21 (a) RDRF Setting and RXI3 Interrupt ................................................................... 406
Figure 17.21 (b) TDRE Setting and TXI3 Interrupt ...................................................................406
Figure 17.21 (c) TEND Setting and TEI3 Interrupt.................................................................... 406
Figure 17.22 Receive Data Sampling Timing in Asynchronous Mode ...................................... 408
Figure 17.23 Relation between RDR Read Timing and Data..................................................... 410
Section 18 Serial Communication Interface 4 (SCI4)
Figure 18.1 Block Diagram of SCI4........................................................................................... 414
Figure 18.2 Data Transfer Format ..............................................................................................422
Figure 18.3 Flowchart Example of SCI4 Initialization............................................................... 423
Figure 18.4 Flowchart Example of Data Transmission ..............................................................424
Figure 18.5 Transmit Operation Example...................................................................................425
Figure 18.6 Flowchart Example of Data Reception....................................................................426
Figure 18.7 Receive Operation Example .................................................................................... 427
Figure 18.8 Flowchart Example of Simultaneous Transmission and Reception ........................428