Datasheet

Section 17 Serial Communications Interface 3 (SCI3, IrDA)
Rev. 2.00 Jul. 04, 2007 Page 360 of 692
REJ09B0309-0200
Bit Bit Name
Initial
Value
R/W Description
3 PER 0 R/(W)* Parity Error
[Setting condition]
• A parity error is generated during reception
[Clearing condition]
• Writing of 0 to bit PER after reading PER = 1
When bit RE in SCR is cleared to 0, bit PER is not
affected and retains its previous state.
Receive data in which a parity error has occurred is still
transferred to RDR, but bit RDRF is not set.
Reception cannot be continued with bit PER set to 1. In
clock synchronous mode, neither transmission nor
reception is possible when bit PER is set to 1.
2 TEND 1 R Transmit End
[Setting conditions]
• The TE bit in SCR is 0
• TDRE = 1 at transmission of the last bit of a 1-byte
serial transmit character
[Clearing conditions]
• Writing of 0 to bit TDRE after reading TDRE = 1
• The transmit data is written to TDR
1 MPBR 0 R Multiprocessor Bit Receive
MPBR stores the multiprocessor bit in the receive
character data. When the RE bit in SCR is cleared to 0,
its previous state is retained.
0 MPBT 0 R/W Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to the
transmit character data.
Note: * Only 0 can be written to clear the flag.