Datasheet

Section 17 Serial Communications Interface 3 (SCI3, IrDA)
Rev. 2.00 Jul. 04, 2007 Page 390 of 692
REJ09B0309-0200
17.5 Operation in Clock Synchronous Mode
Figure 17.9 shows the general format for clock synchronous communication. In clock
synchronous mode, data is transmitted or received synchronous with clock pulses. A single
character in the transmit data consists of the 8-bit data starting from the LSB. In clock
synchronous serial communication, data on the transmission line is output from one falling edge of
the serial clock to the next. In clock synchronous mode, the SCI3 receives data in synchronous
with the rising edge of the serial clock. After 8-bit data is output, the transmission line holds the
MSB state. In clock synchronous mode, no parity or multiprocessor bit is added. Inside the SCI3,
the transmitter and receiver are independent units, enabling full-duplex communication through
the use of a common clock. Both the transmitter and the receiver also have a double-buffered
structure, so data can be read or written during transmission or reception, enabling continuous data
transfer.
Don't care Don't care
One unit of transfer data (character or frame)
8-bit
Bit 0
Serial data
Synchronization
clock
Bit 1 Bit 3 Bit 4 Bit 5
LSB
MSB
Bit 2 Bit 6 Bit 7
*
*
Note: * High except in continuous transfer
Figure 17.9 Data Format in Clock Synchronous Communications
17.5.1 Clock
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK3 pin can be selected, according to the setting of the COM
bit in SMR and CKE0 and CKE1 bits in SCR. When the SCI3 is operated on an internal clock, the
serial clock is output from the SCK3 pin. Eight serial clock pulses are output in the transfer of one
character, and when no transfer is performed the clock is fixed high.
17.5.2 SCI3 Initialization
Before transmitting and receiving data, the SCI3 should be initialized as described in a sample
flowchart in figure 17.4.