Datasheet

Table Of Contents
Section 17 Serial Communications Interface 3 (SCI3, IrDA)
Rev. 2.00 Jul. 04, 2007 Page 407 of 692
REJ09B0309-0200
17.9 Usage Notes
17.9.1 Break Detection and Processing
When framing error detection is performed, a break can be detected by reading the RXD3 pin
value directly. In a break, the input from the RXD3 pin becomes all 0, setting the FER flag, and
possibly the PER flag. Note that as the SCI3 continues the receive operation after receiving a
break, even if the FER flag is cleared to 0, it will be set to 1 again.
17.9.2 Mark State and Break Sending
When TE is 0, the TXD3 pin is used as an I/O port whose direction (input or output) and level are
determined by PCR and PDR. This can be used to set the TXD3 pin to mark state (high level) or
send a break during serial data transmission. To maintain the communication line at mark state
until TE is set to 1, set both PCR and PDR to 1. As TE is cleared to 0 at this point, the TXD3 pin
becomes an I/O port, and 1 is output from the TXD3 pin. To send a break during serial
transmission, first set PCR to 1 and PDR to 0, and then clear TE to 0. When TE is cleared to 0, the
transmitter is initialized regardless of the current transmission state, the TXD3 pin becomes an I/O
port, and 0 is output from the TXD3 pin.
17.9.3 Receive Error Flags and Transmit Operations (Clock Synchronous Mode Only)
Transmission cannot be started when a receive error flag (OER, PER, or FER) is set to 1, even if
the TDRE flag is cleared to 0. Be sure to clear the receive error flags to 0 before starting
transmission. Note also that receive error flags cannot be cleared to 0 even if the RE bit is cleared
to 0.