Datasheet

Section 3 Exception Handling
Rev. 2.00 Jul. 04, 2007 Page 51 of 692
REJ09B0309-0200
3.3 Interrupts
The interrupt sources include 14 external interrupts (NMI, IRQ0, IRQ1, IRQ3, IRQ4, IRQAEC,
and WKP7 to WKP0) and 28 internal interrupts (for the flash memory version) or 27 internal
interrupts (for the masked ROM version) from on-chip peripheral modules. Figure 3.2 shows the
interrupt sources and their numbers.
The on-chip peripheral modules which require interrupt sources are the watchdog timer (WDT),
address break, realtime clock (RTC), 16-bit timer pulse unit (TPU), asynchronous event counter
(AEC), timer C, timer F, timer G, serial communication interface (SCI), and A/D converter.
Interrupt vector addresses are allocated to individual sources.
NMI is an interrupt with the highest priority and accepted at all times. Interrupts are controlled by
the interrupt controller. The interrupt controller sets interrupts other than NMI to three levels of
priorities in order to control multiple interrupts. The interrupt priority registers A to F (IPRA to
IPRF) of the interrupt controller set the interrupt priorities.
For details on interrupts, see section 4, Interrupt Controller.
Interrupts
Notes: ( ) indicates the source number.
1. When the WDT is used as an interval timer, an interrupt request
is generated each time the counter overflows.
2. Available only for the F-ZTAT version.
External interrupts
NMI (1)
IRQ0, IRQ1, IRQ3, IRQ4, and IRQAEC (5)
WKP0 to WKP7 (8)
WDT*
1
(1)
Address break (1)
Realtime clock (8)
Asynchronous event counter (1)
16-bit timer pulse unit (6)
Timer C (1)
Timer F (2)
Timer G (1)
SCI3 (3)
SCI4*
2
(1)
A/D converter (1)
SLEEP instruction execution (1)
IIC bus (1)
Internal interrupts
Figure 3.2 Interrupt Sources and their Numbers