Datasheet

Section 3 Exception Handling
Rev. 2.00 Jul. 04, 2007 Page 56 of 692
REJ09B0309-0200
Figure 3.5 shows the procedure for setting a bit in a port mode register and clearing the interrupt
request flag. This procedure also applies to AEGSR setting.
When switching a pin function, mask the interrupt before setting the bit in the port mode register
(or AEGSR). After accessing the port mode register (or AEGSR), execute at least one instruction
(e.g., NOP), then clear the interrupt request flag from 1 to 0. If the instruction to clear the flag to 0
is executed immediately after the port mode register (or AEGSR) access without executing an
instruction, the flag will not be cleared.
An alternative method is to avoid the setting of interrupt request flags when pin functions are
switched by keeping the pins at the high level so that the conditions in table 3.2 are not satisfied.
However, the procedure in figure 3.5 is recommended because IECPWM is an internal signal and
determining its value is complicated.
I bit in CCR 1
Set port mode register (or AEGSR) bit
Execute NOP instruction
Interrupts masked. (Another possibility
is to disable the relevant interrupt in the
interrupt enable register 1.)
After setting the port mode register
(or AEGSR) bit, first execute at least
one instruction (e.g., NOP), then clear
the interrupt request flag to 0
Interrupt mask cleared
Clear interrupt request flag to 0
←
I bit in CCR 0
←
Figure 3.5 Port Mode Register (or AEGSR) Setting and Interrupt Request Flag
Clearing Procedure