Datasheet

Section 2 CPU
Rev. 6.00 Aug 04, 2006 page 88 of 680
REJ09B0145-0600
[B: BSET instruction executed]
BSET #0 , @RAM0 The BSET instruction is executed designating the PDR3
work area (RAM0).
[C: After executing BSET]
MOV. B
MOV. B
@RAM0,
R0L,
R0L
@PDR3
The work area (RAM0) value is written to PDR3.
P3
7
P3
6
P3
5
P3
4
P3
3
P3
2
P3
1
P3
0
Input/output Input Input Output Output Output Output Output Output
Pin state Low
level
High
level
Low
level
Low
level
Low
level
Low
level
Low
level
High
level
PCR3 00111111
PDR3 10000001
RAM0 10000001
2. Bit Manipulation in a Register Containing a Write-only Bit
Example 3: BCLR instruction executed designating port 3 control register PCR3
As in the examples above, P3
7
and P3
6
are input pins, with a low-level signal input at P3
7
and a
high-level signal at P3
6
. The remaining pins, P3
5
to P3
0
, are output pins that output low-level
signals. In this example, the BCLR instruction is used to change pin P3
0
to an input port. It is
assumed that a high-level signal will be input to this input pin.
[A: Prior to executing BCLR]
P3
7
P3
6
P3
5
P3
4
P3
3
P3
2
P3
1
P3
0
Input/output Input Input Output Output Output Output Output Output
Pin state Low
level
High
level
Low
level
Low
level
Low
level
Low
level
Low
level
Low
level
PCR3 00111111
PDR3 10000000