Datasheet

Section 6 ROM
Rev. 6.00 Aug 04, 2006 page 176 of 680
REJ09B0145-0600
6.6.5 Flash Memory Enable Register (FENR)
Bit 76543210
FLSHE———————
Initial value00000000
Read/Write R/W ———————
FENR controls CPU access to the flash memory control registers, FLMCR1, FLMCR2, EBR, and
FLPWCR.
Bit 7—Flash Memory Control Register Enable (FLSHE)
This bit controls access to the flash memory control registers.
Bit 7
FLSHE Description
0 Flash memory control registers cannot be accessed (initial value)
1 Flash memory control registers can be accessed
Bits 6 to 0—Reserved
These bits are always read as 0 and cannot be modified.