Datasheet

Rev. 6.00 Aug 04, 2006 page xxiii of xxxvi
Figure 2.17 Data Size and Number of States for Access to and from On-Chip Peripheral
Modules ............................................................................................................. 84
Figure 2.18 Timer Configuration Example........................................................................... 86
Section 3 Exception Handling
Figure 3.1 Reset Sequence.................................................................................................. 94
Figure 3.2 Block Diagram of Interrupt Controller .............................................................. 108
Figure 3.3 Flow Up to Interrupt Acceptance ...................................................................... 110
Figure 3.4 Stack State after Completion of Interrupt Exception Handling ......................... 111
Figure 3.5 Interrupt Sequence............................................................................................. 112
Figure 3.6 Operation when Odd Address is Set in SP ........................................................ 114
Figure 3.7 Port Mode Register Setting and Interrupt Request Flag Clearing Procedure .... 117
Section 4 Clock Pulse Generators
Figure 4.1 Block Diagram of Clock Pulse Generators........................................................ 119
Figure 4.2 Typical Connection to Crystal Oscillator .......................................................... 120
Figure 4.3 Typical Connection to Ceramic Oscillator ........................................................ 120
Figure 4.4 Board Design of Oscillator Circuit .................................................................... 121
Figure 4.5 External Clock Input (Example)........................................................................ 121
Figure 4.6 Typical Connection to 32.768 kHz/38.4 kHz Crystal Oscillator (Subclock)..... 122
Figure 4.7 Equivalent Circuit of 32.768 kHz/38.4 kHz Crystal Oscillator ......................... 122
Figure 4.8 Pin Connection when not Using Subclock ........................................................ 123
Figure 4.9 (a) Pin Connection when Inputting External Clock
(H8/38347R Group and H8/3847S Group)........................................................ 123
Figure 4.9 (b) Pin Connection when Inputting External Clock
(H8/38347 Group and H8/38447 Group) .......................................................... 124
Figure 4.10 Example of Crystal and Ceramic Oscillator Element Arrangement .................. 126
Figure 4.11 Negative Resistance Measurement and Circuit Modification Suggestions ....... 127
Figure 4.12 Oscillation Stabilization Wait Time .................................................................. 128
Section 5 Power-Down Modes
Figure 5.1 Mode Transition Diagram.................................................................................. 132
Figure 5.2 Standby Mode Transition and Pin States........................................................... 141
Figure 5.3 External Input Signal Capture when Signal Changes before/after
Standby Mode or Watch Mode.......................................................................... 143
Section 6 ROM
Figure 6.1 ROM Block Diagram (H8/3844R, H8/3844S, H8/38344 and H8/38444)......... 156
Figure 6.2 Socket Adapter Pin Correspondence (with HN27C101) ................................... 158
Figure 6.3 H8/3847R Memory Map in PROM Mode......................................................... 159