Datasheet

Section 8 I/O Ports
Rev. 6.00 Aug 04, 2006 page 213 of 680
REJ09B0145-0600
8.3 Port 2
8.3.1 Overview
Port 2 is an 8-bit I/O port. Figure 8.2 shows its pin configuration.
In the F-ZTAT version, the on-chip pull-up MOS for pin P2
4
is on during the reset period. It turns
off and normal operation resumes after the reset is cleared. The pull-up MOS is controlled by
hardware; it cannot be manipulated by a user program. This should be considered when making
connections to external circuitry. Note that the mask ROM and ZTAT versions do not have this
function.
P2
7
P2
6
P2 5
P2
4
P2
3
P2
2
/SO
1
P2
1
/SI
1
P2
0
/SCK
1
Port 2
Figure 8.2 Port 2 Pin Configuration
8.3.2 Register Configuration and Description
Table 8.5 shows the port 2 register configuration.
Table 8.5 Port 2 Registers
Name Abbr. R/W Initial Value Address
Port data register 2 PDR2 R/W H'00 H'FFD5
Port control register 2 PCR2 W H'00 H'FFE5
Port mode register 2 PMR2 R/W H'D8* H'FFC9
Port mode register 4 PMR4 R/W H'00 H'FFCB
Note: * H'58 in the H8/38347 Group and H8/38447 Group.