Datasheet

Section 9 Timers
Rev. 6.00 Aug 04, 2006 page 267 of 680
REJ09B0145-0600
2. Block Diagram
Figure 9.2 shows a block diagram of timer C.
UD
φ
TMIC
φ
W /4
PSS
TMC
Internal data bus
TCC
TLC
IRRTC
Legend:
TMC
TCC
TLC
IRRTC
PSS
: Timer mode register C
: Timer counter C
: Timer load register C
: Timer C overflow interrupt request flag
: Prescaler S
Figure 9.2 Block Diagram of Timer C
3. Pin Configuration
Table 9.5 shows the timer C pin configuration.
Table 9.5 Pin Configuration
Name Abbr. I/O Function
Timer C event input TMIC Input Input pin for event input to TCC
Timer C up/down-count selection UD Input Timer C up/down select