Datasheet

Section 9 Timers

Rev. 6.00 Aug 04, 2006 page 318 of 680

REJ09B0145-0600

Figure 9.18 shows an example of watchdog timer operations.

H'F8

TCW overflow

Start

H'F8 written

in TCW

H'F8 written in TCW

Reset

Internal reset

signal

512 φ

OSC

clock cycles

H'FF

H'00

TCW count

value

Example: φ = 2 MHz and the desired overflow period is 30 ms.

The value set in TCW should therefore be 256 – 8 = 248 (H'F8).

2 × 10

× 30 × 10

–3

= 7.3

8192

Figure 9.18 Typical Watchdog Timer Operations (Example)